What programming languages are supported?
Ladder diagram, relay symbol language, and Sequential Function Chart (SFC)
1 actual photo shown first. Reference images are model-matched and must be confirmed before purchase.
Mitsubishi
A2USHCPU-S1
Mitsubishi
The A2USHCPU-S1 is a high-performance CPU unit for Mitsubishi’s MELSEC-A series PLC platforms, designed for backplane/rack mounting in industrial automation systems. It supports ladder diagram, relay symbol language, and SFC programming, offering robust arithmetic and data handling including floating-point operations, fixed-point BCD, trigonometric and logarithmic functions, text processing, and advanced diagnostics. Program capacity is 30K steps with 256 KB RAM and extensive device registers, counters, and relays to accommodate complex control strategies. I/O connectivity scales to 8192 device points with 1024 local I/O points, suitable for large installations. Sequence instruction processing time is 0.09 microseconds per step, enabling fast deterministic control. Operational temperature ranges from 0 to 55 °C with storage from −20 to 75 °C, supporting harsh environments. Features include constant scan, power-failure latch, remote run/stop/pause, sampling trace, step operation, interrupts, watchdog timer, and SFC-dedicated microcomputer area. This unit is commercialized and is equivalent to model A2USHCPUS1.
Condition, indicative price, stock, and lead time. Confirm current availability via RFQ.
New
Never Used
Used
FNFP
Actual photos when available
Nameplate, condition, and visible wear can be shared before quote when stock photos are not enough.
Test notes for used units
Power-on or function test status is stated when available, with clear condition grading.
Trackable global shipping
DHL, FedEx, UPS, or forwarder options can be quoted with packing photos and tracking details.
Clear DOA boundary
For tested units, quote terms can include 7-day DOA support unless otherwise stated.
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Ladder diagram, relay symbol language, and Sequential Function Chart (SFC)
Up to 30K steps with 256 KB RAM
0.09 microseconds per LD instruction
8192 device I/O points and 1024 local I/O points
Backplane or rack mounting